ADD: Add (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0|1|0 1 0 0|S| Rn | Rd | imm12 | +---------------------------------------------------------------+ assembly: add Rd, Rn, #imm12 effect: Rd <- Rn + extend(imm12) example: e283300a add r3, r3, #10 ------------------------------------------------------------------------------ ADD: Add (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 0 0 1| | Rn | Rd | | Rm | +---------------------------------------------------------------+ assembly: ADD Rd, Rn, Rm effect: Rd <- Rn + Rm example: e0823003 ADD r3, r2, r3 ------------------------------------------------------------------------------ AND: Bitwise And (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 1 0|0 0 0|S| Rn | Rd | imm12 | +---------------------------------------------------------------+ assembly: AND Rd, Rn, Rm effect: Rd <- Rn & extend(imm12) example: e2078025 AND r8, r7, #37 NOTE: "&" is the symbol used for bitwise and ------------------------------------------------------------------------------ AND: Bitwise And (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 0 0|0 0 0|S| Rn | Rd | | Rm | +---------------------------------------------------------------+ assembly: AND Rd, Rn, Rm effect: Rd <- Rn & Rm example: e0023003 AND r3, r2, r3 NOTE: "&" is the symbol used for bitwise and ------------------------------------------------------------------------------ B: Branch 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | cond |1 0 1 0| offset | +---------------------------------------------------------------+ assembly: B #48 effect: if cond evaluates to false, PC <- PC + 4 as normal if cond evaluates to true, PC <- PC + 4 + sign-extend(offset) * 4 examples: 0a000001 BE #1 1afffff9 BNE #-7 cond: 0 0 0 0 equal (BE) 0 0 0 1 not-equal (BNE) 1 0 1 0 greater-than-or-equal (BGE) 1 0 1 1 less-than (BLT) 1 1 0 0 greater-than (BG) 1 1 0 1 less-than-or-equal (BLE) 1 1 1 0 always (B) ------------------------------------------------------------------------------ CMP: Compare (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 1 1 0|1 0|1| Rn | | imm12 | +---------------------------------------------------------------+ assembly: CMP Rn, #imm12 effect: condition-code register saves result of comparing contents of Rn and extend(imm12) example: e354002a CMP r4, #42 ------------------------------------------------------------------------------ CMP: Compare (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 0 1 0|1 0|1| Rn | | Rm | +---------------------------------------------------------------+ assembly: CMP Rn, Rm effect: condition-code register saves result of comparing contents of Rn example: e1590007 CMP r9, r7 ------------------------------------------------------------------------------ EOR: Bitwise Exclusive OR (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 1 0|0 0 1|S| Rn | Rd | imm12 | +---------------------------------------------------------------+ assembly: EOR Rd, Rn, #imm12 effect: Rd <- Rn ^ extend(imm12) example: e2278025 EOR r8, r7, #37 NOTE: "^" is the symbol used for bitwise exclusive-or ------------------------------------------------------------------------------ EOR: Bitwise Exclusive Or (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 0 0|0 0 1|S| Rn | Rd | | Rm | +---------------------------------------------------------------+ assembly: EOR Rd, Rn, Rm effect: Rd <- Rn ^ Rm example: e0223003 EOR r3, r2, r3 NOTE: "^" is the symbol used for bitwise exclusive-or ------------------------------------------------------------------------------ LDR: Load Register (post-index) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 1 0|0|U|0|0|1| Rn | Rt | imm12 | +---------------------------------------------------------------+ assembly: LDR Rt, [Rn], #imm12 effect: if U == 0: Rt <- Mem[Rn] Rn <- Rn - imm12 if U == 1: Rt <- Mem[Rn] Rn <- Rn + imm12 examples: e493200a LDR r3, [r2], #10 e4187023 LDR r8, [r7], #-35 ------------------------------------------------------------------------------ LDR: Load Register (pre-index) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 1 0|1|U|0|1|1| Rn | Rt | imm12 | +---------------------------------------------------------------+ assembly: LDR Rt, [Rn, #imm12]! effect: if U == 0: Rt <- Mem[Rn - imm12] Rn <- Rn - imm12 if U == 1: Rt <- Mem[Rn + imm12] Rn <- Rn + imm12 example: e5b81061 LDR r1, [r8, #97]! e53d903f LDR r9, [r13, #-63]! ------------------------------------------------------------------------------ LDR: Load Register (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 1 0|1|U|0|0|1| Rn | Rt | imm12 | +---------------------------------------------------------------+ assembly: LDR Rt, [Rn, #imm12] effect: if U == 0: Rt <- Mem[Rn - imm12] if U == 1: Rt <- Mem[Rn + imm12] example: e5913013 LDR r3, [r1, #19] e517401d LDR r4, [r7, #-30] ------------------------------------------------------------------------------ MOV: Move (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0|1|1 1 0 1|S| | Rd | imm12 | +---------------------------------------------------------------+ assembly: mov Rd, #imm12 effect: Rd <- extend(imm12) example: e3a0300a mov r3, #10 ------------------------------------------------------------------------------ MOV: Move (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0|0|1 1 0 1|S| | Rd | | Rm | +---------------------------------------------------------------+ assembly: mov Rd, Rm effect: Rd <- Rm example: e1a00003 mov r0, r3 ------------------------------------------------------------------------------ MVN: Bitwise Negate (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 1 1 1|1 1|S| | Rd | imm12 | +---------------------------------------------------------------+ assembly: MVN Rd, #imm12 effect: Rd <- ~(extend(imm12)) example: e3e0300a MVN r3, #10 NOTE: "~" is the symbol for bitwise not (inversion) ------------------------------------------------------------------------------ MVN: Bitwise Negate (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 0 1 1|1 1|S| | Rd | | Rm | +---------------------------------------------------------------+ assembly: MVN Rd, Rm effect: Rd <- ~(Rm) example: e1e00003 MVN r0, r3 NOTE: "~" is the symbol for bitwise not (inversion) ------------------------------------------------------------------------------ ORR: Bitwise Or (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 1 1 1|0 0|S| Rn | Rd | imm12 | +---------------------------------------------------------------+ assembly: ORR Rd, Rn, #imm12 effect: Rd <- Rn | extend(imm12) example: e3878025 ORR r8, r7, #37 NOTE: "|" is the symbol used for bitwise or ------------------------------------------------------------------------------ ORR: Bitwise Or (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0 0 1 1|0 0|S| Rn | Rd | | Rm | +---------------------------------------------------------------+ assembly: ORR Rd, Rn, Rm effect: Rd <- Rn ^ Rm example: e1823003 ORR r3, r2, r3 NOTE: "|" is the symbol used for bitwise or ------------------------------------------------------------------------------ RSB: Reverse Subtract (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0|1|0 0 1 1|S| Rn | Rd | imm12 | +---------------------------------------------------------------+ assembly: rsb Rd, Rn, #imm12 effect: Rd <- extend(imm12) - Rn example: e263300a rsb r3, r3, #10 ------------------------------------------------------------------------------ RSB: Reverse Subtract (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0|0|0 0 1 1|S| Rn | Rd | | Rm | +---------------------------------------------------------------+ assembly: rsb Rd, Rn, Rm effect: Rd <- Rm - Rn example: e0633004 rsb r3, r3, r4 ------------------------------------------------------------------------------ SUB: Subtract (immediate) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0|1|0 0 1 0|S| Rn | Rd | imm12 | +---------------------------------------------------------------+ assembly: sub Rd, Rn, #imm12 effect: Rd <- Rn - extend(imm12) example: e243300a sub r3, r3, #10 ------------------------------------------------------------------------------ SUB: Subtract (register) 3 2 1 0 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 +---------------------------------------------------------------+ | |0 0|0|0 0 1 0|S| Rn | Rd | | Rm | +---------------------------------------------------------------+ assembly: sub Rd, Rn, Rm effect: Rd <- Rn - Rm example: e0423003 sub r3, r2, r3 ------------------------------------------------------------------------------