CS 202 - Homework 9

Due: Monday 5/7 at 5pm

This homework has 3 parts and covers floating point representations and the first half of the Σniac circuit project. You have to do parts 1 and 2 by yourself, but on part 3 you may work in groups of two, or by yourself if you prefer.


Part 1: Floating point representations - written problems (to be done individually)

Read Tanenbaum, Appendix B and Martin, Chapter 2.2.4. Do the following written problems:
  1. Tanenbaum, Appendix B, problems 1.c, 1.d, 2.c, 2.d.
  2. Martin, Chapter 2, problems 24, 25, 26.
Type up your answers and submit in PDF format as "written.pdf".


Part 2: Floating point representations - C programming (to be done individually)

Copy the program floattest.c from ~schar/cs202/hw9/ into your directory, and complete it. The program is supposed to "dissect" a floating point number into its components. The function of the program should be clear from reading the skeleton provided. In the same directory there is also a sample executable that works for a restricted set of inputs. You can compare the output of the sample program to the output of your program to make sure it works. Submit your completed program, as well as a text file "sampleout.txt" containing the output of your program when run on the following test cases (copy and paste from the terminal):

./floattest 0
./floattest 1
./floattest 1.5
./floattest 3.14159265
./floattest -.2
./floattest 3755.8042
./floattest 1.234e-20


Part 3: Σniac II circuit - registers, arithmetic, memory, and connections
(can be done in groups of 2)

This is the first half of the Σniac circuit project, in which you will implement most of the components of the circuit, and connect them with buses. For the final homework you will add the control circuitry that will bring your Σniac to life.

Σniac processor organization

The Σniac II has the following internal registers:
AAccumulator — 8 bits
ICInstruction counter — 5 bits
MA  Memory address register — 5 bits
MBMemory buffer — 8 bits
OPOpcode register — 3 bits
BB register (for second operand) — 8 bits

These registers are interconnected in the following way (the circles represent tri-state buffers):

Create a new circuit file "zniac.circ" to implement this diagram.

Components

You will need the following components:
  1. Six registers as described above (with 8, 5, or 3 data bits). Connect each register's clock input to a common clock signal "c" via tunnels, and connect a tunnel to the "en" input, using the register name prefixed by "ld_", e.g., ld_A, ld_IC, ld_MA, etc.

  2. A 16x8 ROM (4 address bits), an 8x8 ROM, and an 8x8 RAM (3 address bits each) from Logisim's Memory library. For the RAM, use the option "One synchronous load/store port". Arrange the ROMs and RAM as follows:
    The 5-bit wire bundle on the left will come from the output of the MA register. Add pins for "read" and "write" signals. Add gates to decode the upper two address bits (a3, a4) to select the correct memory chip as follows:

  3. An 8-bit adder/subtractor with 8-bit inputs A and B, 8-bit output S, and two control inputs, "zero_A" and "sub_B". If sub_B=1, the circuit should compute S = A-B. If zero_A=1, it should set A to 0 before adding, i.e., it should simply compute S = B. You can build this circuit from 2 of your 4-bit adder/subtractors from HW 5 plus some extra gates. Or, you can use Logisim's 8-bit Adder together with 2 subcircuits that can set A=0 and invert B.

  4. A 5-bit incrementer (to compute IC+1). You can build this using Logisim's 5-bit adder, with 5-bit constant 0x01 on one of the inputs.

  5. A 3-to-8 decoder, attached to the output of the OP register. You can attach tunnels to 7 of the 8 outputs of the decoder, corresponding to the 7 Σniac instructions.

  6. Wire bundles, splitters, tri-state buffers, and tunnels, to connect everything. Use tunnels only for the control signals, not for the buses (bundles).

  7. For this homework, we'll use pins to create all control signals manually. Arrange these pins along the left edge of your circuit, with named tunnels attached. Here's a picture of that portion of my circuit. Here, "r" is a reset signal used to reset MA and IC to zero. (If you want, you can attach it to the other registers too, but it's not necessary.)

Your main job for this homework is to come up with a clean layout to connect all components as shown in the block diagram above. Once you have everything connected, you should test your circuit by setting the control signals. Double-click on the ROM and RAM contents to change them. Initially, with all signals set to 0 and after pushing the reset button, all displays should show 0, except for the data lines, which should be in "Z" mode. When you set read=1 you should see the contents of memory cell 0 on the data lines. With IC+1->IC=1 and ld_IC=1, pushing the clock button should cycle IC=00, 01, 02, ..., 1e, 1f, 00. You can test your entire circuit in this manner. In the final homework of the semester you'll add the circuitry to generate these signals automagically.


Electronic submission

For parts 1 and 2, submit your files written.pdf, floattest.c, and sampleout.txt. Make sure all files contain your name. For part 3, if you work in a team, only one team member should submit your file zniac.circ, with both names shown on the main circuit. Upload all files using the HW 9 submission page by 5pm on the due date.