CS 202 - Homework 10 - 11/19/07
Due: Friday, 11/30/07, in class (or by 2pm the latest)
This homework has 3 parts and covers floating point representations
and the first half of the Sniac circuit
project. You have to do parts 1 and 2 by yourself, but on part 3 you
are encouraged to work in groups of two. I only need one submission
per group on part 3. On your submissions for each part, please
write down how much time it took you.
Part 1: Floating point representations - written problems
Read Tanenbaum, Appendix B and Martin, Chapter 2.2.4. Do the
following written problems:
- Tanenbaum, Appendix B, problems 1.c, 1.d, 2.c, 2.d.
- Martin, Chapter 2, problems 24, 25, 26
Part 2: Floating point representations - C programming
Copy the program floattest.c from ~schar/cs202/hw10/
into your directory, and complete it. The program is supposed to
"dissect" a floating point number into its components. The function
of the program should be clear from reading the skeleton provided.
There is also a sample executable that works for a restricted set of
inputs. You can compare the output of the sample program to the
output of your program to make sure it works. Hand in a printout of
your completed program, and a printout of the following test cases:
floattest 0
floattest 1
floattest 1.5
floattest 3.14159265
floattest -.2
floattest 3755.8042
floattest 1.234e-20
Part 3: Sniac II circuit - registers, arithmetic, memory, and
busses
This is the first half of the Sniac circuit
project. This week you will implement most of the components of the
circuit, and connect them with busses. Next week you will add the
control circuitry that will bring your Sniac to life!
Sniac processor organization
The Sniac II has the following internal registers:
| A | Accumulator |
| IC | Instruction counter |
| MA | Memory address register |
| MB | Memory buffer |
| OP | Opcode register |
| B | B register (for second operand) |
These registers are interconnected in the following way (the circles
represent tri-state buffers):
Components
You will need the following components:
- An 8-bit register with 8 data inputs, 8 data outputs, and control
inputs "c" (clock), "ld" (load), and "r" (reset) that uses 8
D-flip-flops to store a byte. Since the entire circuit will use
negative edge-triggered synchronous logic, build your D-flip-flops
from LogicWorks's "JK Flip Flop". Connect "c" to all clock inputs, and
"r" to all (inverted) reset inputs. We'll use an inverted reset
signal (r=0 means reset) in the entire circuit.
- An 8-bit tri-state buffer with non-inverting "enable" input. You
can build it from one "Buffer-8 T.S." and one NOT gate.
- Your 8x8 ROM and 8x8 RAM from HW 7 and 9.
- An 8-bit adder/subtracter with 16 inputs (A0..7 and B0..7), 8
outputs (S0..7), and two control inputs, "zero_A" and "sub_B". If
sub_B=1, the circuit should compute S = A-B. If zero_A=1, it should
set A to 0 before adding, i.e., it should simply compute S = B. You
can build this circuit from 2 of your 4-bit adder/subtractors from HW
5 plus some extra gates. Or, you can (like my design) use LogicWorks's
"Adder-8" together with 2 subcircuits that can set A=0 and invert B.
- A 5-bit incrementer (to compute IC+1). You can build this using
5 half-adders, or you can simply use LogicWorks's "Incrementer-8 wo/Car"
and ignore the upper 3 bits.
Since this is a fairly complex circuit, I'm providing a picture of my own implementation. Your job
this week is to implement a circuit like this. Feel free to copy my
design, or just use it as a rough guideline, or ignore it altogether.
My design could definitely be improved - for example, IC and MA (and
the buffers connected to them) should really only be 5 bits wide.
There should also be a cleaner way to lay out the various busses.
Like my circuit, however, your circuit should have plenty of probes
and hex displays so that you can observe the contents of all
registers. Also, it is a good idea to keep inputs on the left
and outputs on the right when possible.
For this first part of the Sniac project we'll use switches for all
control signals. You should test your circuit by setting these
switches. Initially, with all switches set to 0 and after pushing the
reset button, all displays should show 0, except for the data lines,
which should be in "Z" mode. When you set read=1 you should see the
contents of memory cell 0 on the data lines. With inc_IC=1 and
ld_IC=1, pushing the clock button should cycle IC=00, 01, 02, ..., 1e, 1f,
00. You can test your entire circuit in this manner.
In the final homework of the semester you'll add the circuitry to
generate these signals automagically.
What to hand in
Hand in your written answers for part 1, a printout of your program
and of the test cases for part 2, and printouts of your circuit and
all subcircuits you defined for part 3. Don't forget to note how much
time it took you.
Have fun!