pete > courses > CS 202 Spring 24 > Tier 2, Phase 1, Problem 05: 4-bit ripple-carry adder

Tier 2, Phase 1, Problem 05: 4-bit ripple-carry adder

You will implement a 4-bit ripple-carry adder and associated tests.

We have gotten to the point where writing tests that exercise every possible input is cumbersome. One solution is to write a program to write the tests for you, but I won’t require you do that. Instead, my advice is to think about which parts of the circuit could go wrong. If you trust that the built-in components perform as advertised, how might those have been wired together incorrectly? Consider the purpose of the wires and compose tests that verify they do the right thing in the right circumstances.

Furthermore, inputs are now multiple bits, which will require a small change in the structure of your test file: for multi-bit inputs, you must put the number of bits in square brackets following the name of the pin: eg, "A[4]" for a 4-bit input labeled "A".

Here’s an example: I’m guessing you’ll probably have a wire that carries the result of adding together the two right-most bits. Sometimes this wire should carry a zero and sometimes it should carry a one; the value on this wire should depend only on the values of the right-most bits of the two inputs.

Therefore, a test like this could check just that behavior:

A[4] B[4] sum[4] overflow

# test sum of right-most bits
0x0  0x0  0x0    0
0x0  0x1  0x1    0
0x1  0x0  0x1    0
0x1  0x1  0x2    0

Use this as a model to test the remaining functionality of your circuit. You can use comments (lines starting with "#") to add note which functionality is being tested by which part of the file. It is also sometimes helpful to toss in random-ish tests just to reduce the chance you’ve missed something.

Your test-vector.txt file will be expected to test all meaningful behavior of your circuit.

Submission Requirements

You will submit a single Logisim-Evolution circuit file and a single text file containing tests that verify your circuit’s correctness. The name of the circuit file must be ripple_carry_adder.circ and the name of the test file must be test-vector.txt.

The main circuit within ripple_carry_adder.circ should have two 4-bit inputs, labeled "A" and "B", respectively; one 4-bit output labeled "sum"; and one 1-bit output labeled "overflow". The "sum" output should reflect the unsigned binary representation of the sum of the A and B inputs, themselves interpreted as unsigned binary integer values; the "overflow" output should be 1 in the case of overflow and 0 otherwise.

You are limited to the following Logisim components (though you are not required to use them all):

You may add as many subcircuits as you deem appropriate.

Submission Instructions

Copy the ripple_carry_adder.circ and test-vector.txt files to weathertop and then run:

$ 202 submit t2p1p05 ripple_carry_adder.circ
$ 202 submit t2p1p05 test-vector.txt

Submissions will not be accepted after 2pm on Monday, 04 March.

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