<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project source="3.7.2" version="1.0">
  This file is intended to be loaded by Logisim-evolution v3.7.2(https://github.com/logisim-evolution/).

  <lib desc="#Wiring" name="0">
    <tool name="Pin">
      <a name="appearance" val="classic"/>
    </tool>
  </lib>
  <lib desc="#Gates" name="1"/>
  <lib desc="#Plexers" name="2"/>
  <lib desc="#Arithmetic" name="3"/>
  <lib desc="#Memory" name="4"/>
  <lib desc="#I/O" name="5"/>
  <lib desc="#TTL" name="6"/>
  <lib desc="#TCL" name="7"/>
  <lib desc="#Base" name="8"/>
  <lib desc="#BFH-Praktika" name="9"/>
  <lib desc="#Input/Output-Extra" name="10"/>
  <lib desc="#Soc" name="11"/>
  <main name="main"/>
  <options>
    <a name="gateUndefined" val="ignore"/>
    <a name="simlimit" val="1000"/>
    <a name="simrand" val="0"/>
  </options>
  <mappings>
    <tool lib="8" map="Button2" name="Menu Tool"/>
    <tool lib="8" map="Button3" name="Menu Tool"/>
    <tool lib="8" map="Ctrl Button1" name="Menu Tool"/>
  </mappings>
  <toolbar>
    <tool lib="8" name="Poke Tool"/>
    <tool lib="8" name="Edit Tool"/>
    <tool lib="8" name="Wiring Tool"/>
    <tool lib="8" name="Text Tool"/>
    <sep/>
    <tool lib="0" name="Pin"/>
    <tool lib="0" name="Pin">
      <a name="facing" val="west"/>
      <a name="output" val="true"/>
    </tool>
    <sep/>
    <tool lib="1" name="NOT Gate"/>
    <tool lib="1" name="AND Gate"/>
    <tool lib="1" name="OR Gate"/>
    <tool lib="1" name="XOR Gate"/>
    <tool lib="1" name="NAND Gate"/>
    <tool lib="1" name="NOR Gate"/>
    <sep/>
    <tool lib="4" name="D Flip-Flop"/>
    <tool lib="4" name="Register"/>
  </toolbar>
  <circuit name="main">
    <a name="appearance" val="logisim_evolution"/>
    <a name="circuit" val="main"/>
    <a name="circuitnamedboxfixedsize" val="true"/>
    <a name="simulationFrequency" val="1.0"/>
    <comp lib="0" loc="(260,80)" name="Pin">
      <a name="appearance" val="NewPins"/>
      <a name="facing" val="west"/>
      <a name="label" val="Q"/>
      <a name="output" val="true"/>
    </comp>
    <comp lib="0" loc="(90,120)" name="Pin">
      <a name="appearance" val="NewPins"/>
      <a name="label" val="en"/>
    </comp>
    <comp lib="0" loc="(90,150)" name="Pin">
      <a name="appearance" val="NewPins"/>
      <a name="label" val="clk"/>
    </comp>
    <comp lib="0" loc="(90,90)" name="Pin">
      <a name="appearance" val="NewPins"/>
      <a name="label" val="D"/>
    </comp>
    <comp lib="2" loc="(140,80)" name="Multiplexer">
      <a name="size" val="20"/>
    </comp>
    <comp lib="4" loc="(170,70)" name="D Flip-Flop">
      <a name="appearance" val="logisim_evolution"/>
    </comp>
    <wire from="(100,40)" to="(100,70)"/>
    <wire from="(100,40)" to="(240,40)"/>
    <wire from="(100,70)" to="(120,70)"/>
    <wire from="(130,100)" to="(130,120)"/>
    <wire from="(140,80)" to="(160,80)"/>
    <wire from="(150,120)" to="(150,150)"/>
    <wire from="(150,120)" to="(160,120)"/>
    <wire from="(220,80)" to="(240,80)"/>
    <wire from="(240,40)" to="(240,80)"/>
    <wire from="(240,80)" to="(260,80)"/>
    <wire from="(90,120)" to="(130,120)"/>
    <wire from="(90,150)" to="(150,150)"/>
    <wire from="(90,90)" to="(120,90)"/>
  </circuit>
</project>
